October 2003 Embedded News Digest

Embedded News Digest
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Dear Reader,

welcome to this month's edition of  MicroController Pros Corporation's Embedded News Digest, your source for microcontroller and embedded system news.


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This month's issue:

ARM: New ARM11 Cores

MIPS: Four new MIPS32 24k Cores

Motorola to Split off Semiconductor Business into Independent Company

Motorola Licenses StarCore DSP and Extends ARM licensing

Philips Expands 32-bit ARM Microcontroller Family

Philips Announces New CPU for Next-Generation of Nexperia™ Media Processors

Philips: I2C LED Blinkers and Dimmers

Renesas SH-MobileV2 with Enhanced Image Processing Functions

TI: New FLASH Based DSPs with CAN

Toshiba Licenses SST SuperFLASH for Microcontrollers

Zilog: Enhanced Z8 Microcontrollers

ARM: New ARM11 Cores

The ARM1156T2-S™ and ARM1156T2F-S™ macrocells are fully synthesizable processors extending the ARM11™ family of cores. The ARM1156T2-S and ARM1156T2F-S cores are based on the ARM v6 instruction set architecture for high performance and real-time applications with the Thumb®-2 enhancements for high code density and implement a nine stage integer pipeline incorporating branch prediction technology to deliver the highest instruction throughput of any ARM11 class processor. The cores incorporate triple AMBA® 3.0 AXI 64-bit systems interfaces for high instruction and data throughput, augmented by an AMBA 3.0 AXI 32-bit I/O interface for effective access to local peripheral devices. The cores support the configuration of fault-tolerant memory technologies for on-chip caches and tightly coupled SRAM arrays enabling high reliability system-on-chip (SoC) solutions. The ARM1156T2F-S incorporates the ARM11 Vector Floating Point coprocessor enhancing the capabilities of the integer core with  floating point capacity.

MIPS: Four new MIPS32 24k Cores

The 24K core family is based upon the recently introduced microarchitecture that offers the following technology features:

Single issue, 8-stage pipeline, Operating performance ranging from 400 to 550 MHz (worst case) in a 0.13 process,
Configurable memory management unit with TLB or fixed mapping, 64-bit high performance memory subsystem with up to six outstanding read transactions.

Implementation of the MIPS32 architecture: Release 2 implementation with features such as multiple general purpose register sets and support for vectored interrupts and reduced interrupt latency, Code compression technology with MIPS16e™ ASE, Fully synthesizable, OCP high-speed point-to-point on-chip interconnect

24Kc™ core: Base version incorporating an eight stage pipeline that is optimized for high performance. Includes a 32x32 Multiply/Divide Unit and configurable memory management unit with TLB or fixed mapping. Ideal for next-generation control plane applications.

24Kf™ core: Includes hardware floating point support that is fully compliant with the IEEE 754 standard.

24Kc and 24Kf Pro™ versions: Enabled with user extendable instructions, featuring the CorExtend™ capability. This facilitates optimization of algorithms for data-plane style processing within a programmable environment. CorExtend technology is fully compatible with the industry-standard MIPS32 architecture, so full tool chain support is maintained.

Motorola to Split off Semiconductor Business into Independent Company

Chairman and Chief Executive Officer Christopher Galvin announced beginning of October that the company intends to separate its semiconductor operations into a publicly traded company. Motorola has not finalized details of the transaction but is considering an initial public offering (IPO) of a portion of SPS, followed by a distribution of remaining shares to shareholders in a tax-free manner, subject to Motorola board approval, favorable market conditions, regulatory approvals and other customary conditions.

Motorola Licenses StarCore DSP and Extends ARM Licensing

To help improve the performance, efficiency and cost of future embedded applications, Motorola licensed StarCore LLC's portfolio of DSP cores and subsystems. Motorola plans to use StarCore's DSP technology as an integral part of future embedded system offerings targeted toward a variety of next-generation products that require efficient, high- performance processing capabilities.

Motorola has also extended it licensing agreement with ARM to include the ARM1136J-S™ core and the ARM1136JF-S™ core to create ARM1136™ core-based, feature-rich wireless devices. Motorola also announced that they will integrate the ARM926EJ-S™ core, incorporating ARM® Jazelle® Java acceleration technology, into their i.MX21 processor for mobile multimedia handheld devices.

Philips Expands 32-bit ARM Microcontroller Family

Philips announced two new members of its high performance, low cost ARM-based microcontroller (MCU) family, the new LPC2114 and LPC2124. Key features of the devices include up to 256K bytes of embedded Flash memory, 10-bit A/D converters, 16K of SRAM, pulse width modulation (PWM) timers, UARTS, serial peripheral interface (SPI) and up to 46 General-Purpose Input/Outputs in a small outline 64-pin package.

The LPC21xx family uses a 0.18-micron CMOS embedded Flash process enabling 1.8V voltage operation. The new devices operate at 60MHz (54 Dhrystone MIPs) and offer 128-bit wide zero wait-state Flash memory.

Philips Announces New CPU for Next-Generation of Nexperia™ Media Processors

Philips announced a new TriMedia™ Central Processing Unit (CPU) core to be used in the next-generation of Philips' Nexperia™ media processors. Philips' new super-pipelined TriMedia CPU achieves over 500 Megahertz (MHz) speed with a fully synthesizable design. Philips is targeting its next-generation of media processors for connected home entertainment applications, including connected high-definition (HD) displays, home media servers, personal video recorders (PVRs) and video over wireless 802.11 network adaptors.

The TriMedia CPU is C-programmable and can support all leading audio and video standards, including MPEG-2, MPEG-4, DV, H.263, and DivX-5. New instructions specifically optimize H.264 decoding. It supports video encoding into MPEG-2, MPEG-4, and DivX formats, making it ideal for PVRs. The ability to transcode from one video format to another supports the design of media gateway products. Furthermore, HDTV decoding with simultaneous picture-in-picture (PIP) display is enabled using a dedicated HD accelerator. Uniquely, the TriMedia CPU can decode HDTV video while simultaneously encoding an MPEG stream. This allows the design of the HDTV displays with Flash card-based PVR capability.

Philips: I2C LED Blinkers and Dimmers

Philips announced two new series of I˛C General Purpose I/O expanders (PCA953x and PCA955x) optimized for controlling LED dimming and blinking. These new 2, 4, 8 and 16 bit devices represent an innovation in I˛C capabilities, allowing designers an easier way to build systems with more dimming or blinking LEDs than previously possible using just basic General Purpose I/Os (GPIO) or microcontrollers (MCUs).

The PCA953x LED Dimmers have a frequency range of 160 Hz to once every 1.6 seconds, with a duty cycle range of completely off to 99.4pct on allowing both dimming and blinking of LEDs. The PCA955x LED Blinkers have a frequency range of 40 Hz to once every 6.4 seconds with a duty cycle range of 0.6pct off to completely on, that allows designers to set, for example, a 4 second blink rate with the LED on for 1 second and then off for 3 seconds. Output drive strength is 25 mA per bit at 5 V operation and 100 mA for 8 bit groups, which is much more than the amount of current typically allowed by a MCU. The devices operate between 2.3 V and 5.5 V and up to a 400 kHz I˛C bus speed. Any I/O pins not used as outputs can be configured and used as normal general-purpose inputs.


The 8-pin PCA9550 2-bit LED Blinker, 16-pin PCA9551 8-bit LED Blinker, 24-pin PCA9552 16-bit LED Blinker/PCA9532 16-bit LED Dimmer and 8-pin PCA9553 4-bit LED Blinker are available now. The 8-pin PCA9530 2-bit LED Dimmer, 16-pin PCA9531 8-bit LED Dimmer and 8-pin PCA9533 4-bit LED Dimmer are sampling now with releases through the end of the year.

Renesas SH-MobileV2 with Enhanced Image Processing Functions

Targeted at next generation mobile phones, the new SH-MobileV2 includes greatly enhanced image processing functions compared with the current SXGA (1-megapixel equivalent) SH-MobileV, including a UXGA (2-megapixel equivalent) camera interface, an MPEG-4 full-hardware accelerator offering higher speed together with lower power consumption, and a new 2D/3D graphics engine performing two- or three-dimensional drawing processing. These features enable high-speed, high-quality, high-functionality image processing to be carried out at low power consumption.

The SH-MobileV2 incorporates a high-performance SH3-DSP CPU core featuring DSP functions and a 133 MHz maximum operating frequency. On-chip peripheral modules include a color management unit enabling color conversion to suit the characteristics of various LCD modules, an LCD controller supporting TFT color LCDs, a video output unit, an IrDA interface, and a sound source providing up to 64 chords and a USB 2.0 (Full-Speed) support function module, enabling implementation of multifunctional systems.

TI: New FLASH Based DSPs with CAN

TI announced unmatched levels of control optimized performance at a competitive low price with the TMS320F2801, TMS320F2806 and TMS320F2808 digital signal controllers.  These new controllers provide a leading 100 MIPS for less than $5 in volume.

The DSPs integrate a number of additional peripherals, including: pulse width modulators (PMW), analog to digital converters (ADC), CAN controller, watchdog timer, event managers and communication peripherals such as SPI, SCI, I2C.

TI's high speed flash memory, which supports program execution at 85MIPS, provides up to 64Kwords of storage with code security protection of important proprietary algorithms from theft or tampering. The new DSPs have up to 18Kwords of RAM for time-critical code or data requiring faster access.

Toshiba Licenses SST SuperFLASH for Microcontrollers

SST (Silicon Storage Technology) and Toshiba announced the companies have signed an agreement to license SST’s SuperFlash technology to Toshiba. While Toshiba will initially license SST’s 0.5 micron technology, the companies expect to expand this relationship to include more advanced generations of SuperFlash. Toshiba will use the SuperFlash technology to develop microcontrollers serving the Chinese market among others.

The agreement represents an expansion of SST’s licensing business, which includes agreements with wafer foundries such as TSMC and 1st Silicon; fabless companies such as Emosyn, the semiconductor division of ATMI and integrated device manufacturers such as IBM, Motorola, National Semiconductor, NEC, Oki Semiconductor, Samsung, Sanyo, Seiko Epson, and Winbond Electronics.

Zilog: Enhanced Z8 Microcontrollers

ZiLOG announced availability of its enhanced Z8 Encore!(R) Flash microcontroller series with 16KB to 64KB of Flash memory. The new series features an enhanced four-mode on-chip oscillator, selectable enable/disable of Voltage Brown Out during Stop mode for improved power consumption, and 5V-tolerant I/O pads. ZiLOG will continue support for its current Z8 Encore!(R) Flash microcontroller, and will make migration assistance available to customers who wish to upgrade and take advantage of the new features.

The Z8 Encore!(R) Flash microcontroller family includes seven configurations with up to 64KByte of high-speed Flash. Features include the 20MHz eZ8 CPU core, up to 4KB of linear register SRAM, and a comprehensive suite of peripherals including an on-chip DMA controller; 12 channel, 10-bit A/D; SPI; I2C; two 9-bit UART ports with integrated Infrared Data Association (IrDA)-compliant encoder/decoders; four 16-bit counter timers, each with capture and PWM capability; and a single-pin, On-Chip Debugger.

The Z8F6421AN020SC with 64KB of Flash memory in the 44-pin LQFP package will sell for $5.06 in 1K unit quantities.

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