welcome to the January 2005 edition of MicroController
Pros Corporation's Embedded News Digest, your source for microcontroller and
embedded system news.
This month's issue:
Embest has upgraded its programming software
for ARM microcontrollers and standalone FLASH memories to version 5.0 The new
version supports more standalone Flash memory chips and adds supports for
programming Atmel AT91SAM7AX Series and AT91SAM7SXX Series microcontrollers. The
software also supports programming of the on-chip Flash memory of the popular
Philips LPC series of ARM based microcontrollers via a JTAG interface.
The software requires a JTAG in-circuit
debugger/programmer interface unit to program the chips. Both software and
suitable JTAG hardware are available from the MicroControllerShop:
The EM6580 provides true
low-current operation (5.8 µA active; 3.3 µA standby; 0.32 µA sleep) with no
external components, 4-bit ADC or 12-level voltage level detector and 8 Kbytes
on-chip Flash memory (4k × 16 bit, plus RAM 80 × 4 bit). It is also possible to
store a unique 52-bit serial ID number on each device produced, allowing for
unique identification and traceability.
The microcontroller operates at
up to 0.4 MIPS, and contains an RC oscillator with
frequencies between 32 to 800 kHz. It also has a power-on reset, watchdog timer,
10 bit up/down counter, PWM and several clock functions.
The EM6580 is pin-to-pin and
function compatible with the ROM-based EM6680, and supports a target voltage of
2.0 to 5.5 V. It is available in SO8 and SO14 packages or in die form.
Goal Semiconductor introduced the UniVersaKit (UVK), a
new development kit and evaluation system that supports all Goal VERSA product
families and ships complete with IDE (Integrated Development Environment), C
compiler and assembler.
The UniVersaKit (UVK) is a complete and comprehensive evaluation platform for
the VERSA mixed-signal and low cost FLASH 8051-based MCU families. The board
includes voltage regulators (3.3V and 5V), an RS-232 transceiver, DB9
connectors, tact switches for manual reset and interrupt triggering, 8 user LEDs,
an I˛C-based EEPROM, Piezo buzzer and driver circuitry, chip peripherals and I/O
pins that are easily accessible through probe vias and onboard header
footprints, character LCD display expansion capabilities and ample prototyping
The UVK includes a VERSA ICP (In-Circuit Programmer) for programming and
in-circuit debugging of the mixed-signal VERSA devices (VMX1020/VMX1016). The
VERSA ICP can also be used for in-system programming in end product production.
This family offers the advantages of all PIC18 microcontrollers
with the addition of high-endurance Enhanced Flash program memory. Memory
capacities of this family include 48K, 64K, 96K and 128K. Performance can reach
up to 10 MIPS over a wide operating voltage range of 2.0 to 5.5V for the
low-voltage versions (standard versions can operate between 4.2 and 5.5V). The
family is available in either 64-pin TQFP (12 A/D channels; 7 I/O ports) or
80-pin TQFP (16 A/D channels; 9 I/O ports) packages.
In addition to their on-board memory, these new microcontrollers
have an external memory interface, allowing the internal program counter to
address a space of up to 2 Megabytes. The controller can thus be run entirely
from external memory, utilize a combination of internal and external memory up
to the 2 Mbyte limit, or use external memory for program data storage.
The PIC18F8722 series provides complete code and tool
compatibility with smaller Microchip microcontrollers. In addition, the new
PIC18F microcontrollers include nanoWatt Technology for reduced energy budgets
and prolonged battery life, along with two synchronous serial ports (capable of
SPI or I2C) and two asynchronous serial ports (LIN-capable USARTs)
for expanded connectivity.
The MCP23008 I/O expander supports standard (100 kHz), fast (400 kHz) and high-speed (up to 1.7 MHz) I2C
communications. The MCP23S08 I/O expander features SPI clock
speeds up to 10 MHz. The new I/O expanders provide system I/O expansion via existing
microcontroller serial ports, eliminating the need to redesign the complete
system with a higher I/O microcontroller. Hardware-address pins allow cascading
of multiple devices, so that up to 64 bits of I/O can be added to existing systems.
In 18-pin PDIP form, the MCP23008 is priced at
$0.75 each in 1,000-unit quantities and the MCP23S08 is priced at $0.80 each in
1,000-unit quantities. They're also available in 18-pin SOIC and 20-pin SSOP
options. All packages are lead-free.
dsPIC30F Symmetric Key Encryption Library enables embedded designers to take
advantage of the high data throughput intrinsic to the popular Advanced
Encryption Standard (AES) and Triple Data Encryption Standard (DES) “Secret Key”
dsPIC30F Asymmetric Key Encryption Library supports the Digital Signature
Algorithm (DSA) and Rivest-Shamir-Adelman (RSA) algorithms, which each utilize
two separate keys to protect data – enabling design engineers to reduce
code-breaking risks by sharing only one of the keys.
dsPIC30F Encryption Libraries, which were developed by NTRU Cryptosystems, Inc.,
of Burlington, MA, consist of C-callable functions. Both libraries are optimized
for speed, code size and RAM usage. RAM usage with the
Symmetric Library is below 60 bytes, and is below 100 bytes with the
Asymmetric Library. Both libraries were developed by NTRU Cryptosystems.
dsPIC30F Symmetric Key Encryption/Decryption Library functions support multiple
modes of operation, including: Electronic Code Book (ECB) mode, Cipher Block
Chaining mode (CBC), CBC-based Message Authentication (CBC-MAC) mode, Counter (CTR)
mode, and combined CBC-MAC and Counter Mode (CCM).
In addition to standard encryption, decryption and
authentication functions, the
dsPIC30F Asymmetric Key Encryption Library has several useful auxiliary
functions. These auxiliary functions include: Modular Arithmetic functions,
Random Number Generator (RNG), SHA-1 Hash algorithm, and the Message Digest
A one-year evaluation license of either library is $5. Volume
production licensing starts at $2,500 for 5000 units.
The dsPIC30F Acoustic Echo Cancellation Library supports
full-duplex communications through two functions that are easily callable via a
well-documented Application Programmer’s Interface (API). One function is used
for initialization and the second function removes the echo component from a
10-millisecond block of sampled 16-bit speech data. These functions ensure that
speaker-to-microphone induced echo is suppressed. Received far-end speech
samples are filtered using an adaptive Finite Impulse Response (FIR) filter. The
coefficients of this filter are adapted using the Normalized Least Means Square
(NLMS) algorithm, such that the filter closely models the acoustic path between
the near-end speaker and the near-end microphone. A Non-Linear Processor (NLP)
algorithm is used to eliminate residual echo. Voice activity detection and
doubletalk detection algorithms are used to avoid updating filter coefficients
when there is no far-end speech, and also when there is simultaneous speech from
both ends of the communication link (doubletalk). This library is configurable
for 16-, 32- or 64-millisecond maximum echo delays (echo tail-lengths). The
library is also compliant with the G.167 standard and has been tested for
compliance with G.167 specifications for in-car applications.
dsPIC30F Noise Suppression Library also has two API-callable functions,
initialization, and the removal of noise from a 10-millisecond block of sampled
16-bit speech. This functionality provides microphone-based applications with
the ability to ensure that only voice content is transmitted. The signal is
sampled at 8 kHz, and a Fast Fourier Transform (FFT) is performed on each
10-millisecond block of data to analyze the frequency components of the signal.
Thereafter, a voice-activity-detection algorithm is used to determine whether
the signal segment is speech or noise. The noise-suppression algorithm maintains
a profile, which is updated each time a noise-only block is detected. Every
frequency band of the input signal is scaled down in proportion to the noise in
that frequency band, thereby causing a significant degree of noise suppression
in the resultant signal. The algorithm adapts to changes in the nature and level
of noise, and does not require a separate noise-reference input.
A one-year evaluation license of either library is $5. Volume
production licensing starts at $2,500 for 5000 units.
The LPC9102 and the LPC9103 are among the world's
smallest 8-bit microcontrollers at 3.0 x 3.0 x 0.85mm, but they also incorporate
many system-level functions on-chip, such as a high-accuracy internal RC
oscillator, brown-out detect, and power-on reset, as well as peripherals such as
8-bit ADC/DAC, comparator and UART.
These highly-integrated devices, based on the
80C51 architecture, feature 1 Kbyte of byte-erasable flash, which can eliminate
the need for a separate EEPROM, and 128 bytes of RAM. An accurate internal RC
oscillator (7.3728MHz, 1 percent accuracy) and an integrated UART enable RS-232
implementation. With eight of the 10 I/O pins on the package easily configurable
by the user, the LPC9102 and LPC9103 have double the functionality and I/O pins
compared to existing MCUs of similar physical size.
The new microcontrollers come in a leadless
10-pin HVSON package with a built-in heat sink on the bottom side.
Renesas Technology Corp. announced the
H8S/2189F 16-bit on-chip flash memory microcontroller offering software IP (Intellectual Property) protection. Sample shipments already
have begun in Japan.
The H8S/2189F includes 1 Megabyte of on-chip Flash memory, and a comprehensive
set of standard on-chip peripheral functions. It can be used in a wide range of
fields by installing network, image processing, or other field-specific software
A 64-Kbyte area for software IP installation
is provided in the on-chip flash memory. Implementing protection for this area
prevents outside access, offering secure protection against illegal reading of a
software IP written in this area. Before protection is implemented, this area
can be read and written to as ordinary flash memory, but once protection has
been applied, program reads and writes cannot be executed in this area. Program
execution is made possible by the use of a memory access control circuit that
allows reading only when a program in this area is executed. Thus, storing a
software IP in this area enables software IP protection to be implemented and
makes it possible to prevent unauthorized copying or illegal modification.
A total of 8 Kbytes of RAM are also provided,
including 2 Kbytes for software IP use. The H8S/2189F incorporates a 16-bit
H8S/2000 CPU core, and operates at a maximum frequency of 20 MHz at a 3.3 V
power supply voltage. The package used is a 144-pin TQFP. As well as 4-channel
16-bit and 8-bit timers, two 14-bit PWM channels, and eight 8-bit PWM channels,
on-chip peripheral functions also include eight 10-bit A/D converter channels
and two serial interface channels.
The sample price in Japan currently is Ą1750
(approximately $17 U.S.).
Sensory announced FluentChip™ technology for
its RSC line of microcontrollers. Also premiering is FluentSoft™ technology,
which is available to be licensed to other manufacturers for use on other
hardware platforms. FluentChip™ and FluentSoft™ came to Sensory from the
acquisition of Fluent Speech Technologies, a group of academics out of the
Oregon Graduate Institute’s (OGI) Center for Speech and Language Understanding.
The Fluent team spent over four years perfecting a technology that requires as
little as 20K of memory to recognize a word set with extremely high accuracy,
speaker independence and reasonable tolerance for ambient noise.
Sensory’s RSC line of speech I/O
microcontrollers now run the FluentChip™ firmware. These low-cost IC’s sell for
under $2 in volume, and can handle active vocabularies of up to 40
speaker-independent words. All the necessary ROM, RAM and hardware options are
contained on chip, including a general-purpose microcontroller and powerful
16-bit A/D converter.
Based on the 32-bit ARM7TDMI(R) processor,
the TMS470 family offers up to 60MHz of performance and will include seven
devices ranging from 64KB up to 1MB of flash memory.
The single cycle access to embedded flash at
up to 60MHz in pipeline mode allows for fast code execution. The programmable
32-channel high-end timer (HET) provides greater accuracy for widely used timing
functions such as period and pulse measurements, output compare, and pulse width
modulations (PWMs). Along with the HET, the TMS470 MCU includes a
multi-buffered, 10-bit analog-to-digital converter (ADC) with a 1.55 microsecond
conversion time and a variety of industry standard peripherals that offload the
CPU to provide a higher level of system performance, including standard and
enhanced CAN controllers. For more information on the full line of integrated
TM470 MCU peripherals and related reference guides, see
Running at 48MHz, the TMS470R1A64, A128 and
A256 are immediately available from TI and start at $4.95 for 1K quantities and
offer 64KB, 128KB and 256KB of embedded flash memory, respectively. The 60MHz
TMS470R1A288, A512, A768 and A1024 will be made available throughout 2005
starting at $8.95 for 1K quantities and offer 288KB, 512KB, 768KB and 1MB of
embedded flash memory.
MicroController Pros Corporation (µCPros) is an authorized
distributor for many microcontroller tool vendors, which enables us to offer you
a large selection of Microcontroller Development Tools for almost any major
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include: Emulators, EPROM programmers, FLASH programmers, microcontroller C-
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MicroController Pros Corporation
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