This month's issue:
ARM announced the ARM® OptimoDE™Audio Edition embedded data processing technology optimized for the efficient implementation of digital audio in embedded devices.
At the heart of the OptimoDE Audio Edition is the AudioDE™ data processing engine which is compatible with all leading software codecs for multimedia applications such as MP3, WMA, AAC, and AC3. The AudioDE microarchitecture is finely tuned to the digital audio domain, resulting in highly efficient processing and very low power. For example, for 320Kbits/s stereo MP3 decode the core requires just 0.8mW (Artisan TSMC CL013GSFG, Operating voltage=1.2V)
ESPICO, an industry leading supplier of audio codecs, is thesoftware Partner for the ARM OptimoDE Audio Edition technology. ESPICO will develop and market a variety of standards-based audio software codecs that will be optimized to run on ARM OptimoDE embedded signal-processing data engines.
ARM OptimoDE data engine technology is licensable intellectual property with an associated tool environment. OptimoDE technology is a configurable VLIW-styled architecture targeted at high-performance embedded signal processing applications. The tool environment enables the designer to configure and extend the type and number of data path resource units. The size and topology of local storage and the level of interconnect are also fully configurable. OptimoDE data engines are programmed in either C or C++ and are provided with a sophisticated C compiler and profiling analysis tools.
The AT76C713 is the first AVR microcontroller running up to 48 MHz. It is designed to provide a full-speed USB slave interface, compliant to USB 2.0 specification, to systems that need to communicate with a peripheral as a standard or custom class USB device. The AT76C713 implements novel memory architecture by integrating 16 Kbytes of SRAM memory for program code and 4 SRAM banks of 2 Kbytes each originally devoted to data, stack, and variables. Up to three of those banks can be used as program memory in addition to the default 16 Kbytes.
A full USB Chapter 9 compliant bootstrap ROM can support enumeration and program download using descriptor parameters stored in an external EEPROM, dataflash, or even hardwired Atmel-specific USB descriptors, eliminating the cost of the serial non-volatile memory. The AT76C713 offers a high number of general-purpose input/output pins with multifunction capabilities, such as expansion data memory interface, input interrupt lines, output compare timers, or modem control signals for the serial links supported by the two internal UART modules. The UART modules support FIFOs in both directions, and one of those UARTs can support IrDA communication.
The AT76C713-JT100 comes packaged in a lead-free, ROHS compliant, 100-pin TQFP package. At 10K, pricing is $4.00.
The new AT90RF135602 integrates, in a single BGA package, an RF block and an Atmel AVR® high performance RISC microcontroller. It reads and writes to industry-standard 13.56 MHz RFID tags and smart labels. Consuming very little power and optimised for a 2.8V battery operation, it is compliant to ISO/IEC 14443-A parts 2 & 3. It also supports initiation protocol of the forthcoming NFC standard. It can be used to read Philips Semiconductor Gratkorn's MIFARE® Ultralight tags, as well as Innovision R&T's Jewelä RFID tag which are ITSO compatible and used in mass transit ticketing applications.
The new MCF520x and MCF521x families are the first ColdFire
products to offer integrated distributed clocking and low-power divider
functionality to scale the central processing unit (CPU) below 1MHz without
going into shutdown mode. Freescale has also minimized leakage and focused on
packaging enhancements to optimize power consumption without sacrificing
performance, resulting in a typical current draw of less than 1mA/MHz.
The new dsPIC30F2011 and dsPIC30F2012 families offer performance speeds of 20 and 30 Million Instructions Per Second (MIPS), self-programming capabilities via Flash memory, and industrial and extended temperature ranges. The devices feature 12 Kbytes of Flash program memory and can operate at full speed using an internal oscillator (no crystal required). The dsPIC30F2011 is offered in 18-pin DIP and SOIC packages, the dsPIC30F2012 in 28-pin DIP/SOIC and a small 6x6 mm 44-pin QFN.
Additional key features include:1 Kbyte of SRAM; 12-bit analog-to-digital converter with up to ten signal channels and 200K samples-per-second; Three 16-bit timers; Two standard Pulse-Width Modulators; SPI(TM), I2C(TM) and UART peripherals. The dsPIC30F2011 and dsPIC30F2012 are available today for general sampling and volume production in the package options listed below. Both products are available below $3.00 in high volume
Renesas announced the AE55C1 smart card microcontroller incorporating a high-performance CPU core, 40 Kbytes of EEPROM, and large-capacity 240-Kbyte mask ROM, for IC card use in financial, ID, and similar fields.
The AE-5 core thus offers approximately 4 times the processing performance of the AE-4 CPU core, while the maximum operating frequency 20MHz of the AE55C1 is twice that of current products, resulting in an overall 8-fold improvement in processing performance. The AE-5 has upward-compatibility with the instruction set and other features of the AE-4. A DMAC (Direct Memory Access Controller) supporting high-speed communications is incorporated as a new peripheral function not provided in the AE-4 Series, and the current exponential multiplication/division algorithm coprocessor for encryption processing has been enhanced to provide greater security.
The Smart Card controller is available in wafer form or as Chip on Tape. Pricing is 520 Yen and 588 Yen per device, respectively.
ST is introducing lower-cost 64-kbyte Flash versions of both the USB (STR711) and the CAN interface (STR712) devices – alongside the established versions which have either 128 or 256 kbytes of Flash program memory. Both of the new devices retain the 16-kbyte data-Flash memory of other family members and include 16 kbytes of RAM. They are available in a 64-pin TQFP64 package.
Other cost-sensitive applications that don’t need either USB or CAN interfaces can now utilize the new STR715, a lower-cost ‘naked’ MCU with 64 kbytes of code Flash memory, 16 kbytes of data Flash and 16 kbytes of RAM, but with no USB or CAN module.
All of the new MCUs are available now in sample quantities, and will enter volume production by the end of Q2 2005. Pricing is approximately $5.50 in quantities of 10,000 for the STR711 and STR712 members of the family; and approximately $4.60, also in quantities of 10,000, for the STR715.
The new C6455 DSP, 100 percent code compatible with previous
TMS320C64x™ devices, incorporates Serial RapidIO and other new high bandwidth
peripherals. New peripherals and features of this chip, as compared to previous
1 GHz C64x™ DSPs, include:
The enhanced C64x+ DSP core on which the C6455 DSP is based adds new specialized instructions that on average, make code 20 to 30 percent more compact and 20 percent more cycle efficient than code based on TI’s current advanced C64x DSP architecture. The new instructions include complex and 32-bit wide multiplications and simultaneous add/subtract instructions, increasing Fast Fourier Transform (FFT) and Discrete Cosine Transform (DCT) performance. The core can execute eight 16x16 multiply and accumulate instructions per cycle, twice as many as the current C64x DSP core. Since the new C64x+ instruction set is a superset of the C64x instructions, software for the new device is 100 percent object code compatible with code for existing C64x
Volume production is scheduled for the second quarter of 2006. The device will be available in a 697-pin 24 x 24 mm BGA (ball grid array) package. Planned pricing is $259 per 1 GHz unit, $219 per 850 MHz unit, and $179 per 720 MHz unit in quantities of 10K units.
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