December 2006 Embedded News Digest

Embedded News Digest
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Welcome to the December 2006 edition of MicroController Pros Corporation's Embedded News Digest, your source for microcontroller and embedded system news.

This month's issue:

Atmel Announces Latest ARM9-based Microcontroller
Atmel Announces Four New picoPower AVR Microcontrollers
NEC Extends 16- and 32-Bit All Flash Microcontroller Lineup
STMicroelectronics' 8-bit ST7FMC Family Now Qualified for Automotive Applications
TI's New TMS320C6454 DSP Supplies Improvements in Memory and I/O at Lower Cost
Crossware Adds Support for 21 More NXP ARM Microcontrollers

Atmel Announces Latest ARM9-based Microcontroller

Atmel announced the newest member of their SAM9 family, the AT91SAM9263, embedding a 200 MIPS ARM926EJ-STM-based microcontroller which overcomes the bottlenecks that occur with conventional ARM9TM-based MCUs in graphically-interfaced, data-intensive applications such as networked medical monitoring equipment and GPS navigation systems. The AT91SAM9263 employs 27 DMA channels, including Atmel's 18-channel peripheral DMA controller (PDC), a 9-layer bus matrix, and two additional buses for data- and instruction-tightly-coupled-memories (TCMs) to boost CPU performance and provide on-chip data transfer rates of up to 41.6 Gbps. Two external bus interfaces (EBIs) support gigabyte-plus external memories.

On-chip human interface peripherals include a camera interface, TFT/STN LCD controller, a 6-channel audio front-end interface (AC97), I2S and a 2D graphics co-processor that off-loads line draw, block transfer, polygon fill, and clipping functions from the CPU.

Networking peripherals include a 12 Mbps USB host and device, a 10/100 Ethernet MAC and a 1 Mbps CAN. There are also four USARTs, two 50 Mbps SPIs, CompactFlash, SDIO (MCI) and a TWI which can be connected to external wired and wireless communication modules like GPRS modem and Wi-Fi.

The AT91SAM9263 integrates 18 simple, silicon-efficient, single-cycle, peripheral DMA controllers, five DMA controllers with burst mode support to the USB host, Ethernet MAC, camera interface, LCD controller and 2D graphics controller, plus a memory-to-memory DMA controller with burst mode, scatter-gather and linked lists support. The DMA controllers completely off-load the execution of data transfers between external serial interfaces and memories. At a 20 Mbps data rate, the SAM9263 still has 88 percent of its MIPS available for application execution.

Atmel has implemented 11 buses and 96 Kbytes of on-chip scratchpad SRAM on the AT92SAM9263. The SRAM can be partly configured as tightly-coupled data and instruction memory (TCM). The buses provide multiple parallel on-chip data transfer channels and a total on-chip bandwidth of 41.6 Gbps.

The AT91SAM9263 has two external bus interfaces (EBI): one for the system memory and one for the human interface. The second EBI eliminates the need for the LCD controller and CPU to share memory, and can increase available CPU MIPS by 20 to 40 percent.

The AT91SAM9263 is available now in a 324-ball BGA package and is priced at sub-$10 for 100,000 units.

Atmel Announces Four New picoPower AVR Microcontrollers

Atmel announced four new AVR microcontrollers that are upgraded versions of the 64-pin ATmega325/329 and the 100-pin ATmega3250/3290 microcontrollers.

The 64-pin ATmega329P and 100-pin ATmega3290P devices integrate a complete LCD controller that has several features, including a dedicated low-power LCD waveform, an internal contrast control, a flexible selection of drive time and frame frequency, an internal power supply for the LCD voltage, and the ability to operate in power-save mode for low power consumption. Compared to existing market solutions, the internal LCD power supply reduces the number of components in the end product, only requires one external capacitor and is powerful enough to drive a 3.3V LCD display from a battery voltage of 1.8V or higher.

The new ATmega325P and ATmega3250P devices are pin- and feature-compatible to the ATmega329P and ATmega3290P, without the on-chip LCD controller. The ATmega325P and ATmega3250P are a perfect fit in applications where many general-purpose I/O, high connectivity and ultra-low power consumption are essential.

All four microcontrollers feature 32 Kbytes of self-programmable Flash memory, 2 Kbytes of SRAM and 1 Kbyte of EEPROM, 10-bit ADC, 3 Timer/Counters, USART, SPI, I2C-compatible two-wire-interface, and full operation from 1.8 to 5.5 volts with up to 16 MIPS throughput. The ATmega329P can support up to 100 LCD segments and the ATmega3290P supports up to 160 LCD segments.

The picoPower technology utilizes a variety of techniques that eliminate unnecessary power consumption in power-down modes. These include an ultra-low-power 32 kHz crystal oscillator, automatic disabling and re-enabling of brown-out detection (BOD) circuitry during sleep modes, a power reduction register that completely powers down individual peripherals, and digital input disable registers that reduces the leakage current on digital inputs. The picoPower AVR microcontrollers consume as little as 340 uA in Active mode, 650 nA in Power-save mode with Real-Time Counter (RTC), and 100 nA in Power-down mode.

The ATmega329P and ATmega325P in 64-pin TQFP or QFN packages are available now. Samples for the ATmega3290P and ATmega3250P in 100-pin TQFP packages will be available in January 2007. Production quantities will be available in the first quarter of 2007 for ATmega329P and ATmega325P, and the second quarter of 2007 for ATmega3290P and ATmega3250P. Volume prices for 10,000 units are $3.54 for ATmega329P, $3.20 for ATmega325P, $3.90 for ATmega3290P and $3.37 for the ATmega3250P, respectively.

NEC Extends 16- and 32-Bit All Flash Microcontroller Lineup

NEC Electronics America announced that it has added 16 new devices to its lineup of 16- and 32-bit all-Flash microcontrollers. These latest MCUs offer up to twice the memory and a significant increase in pin-count options compared to previous devices in the line. The new lineup includes two 32-bit V850ES/JJ3 MCUs with up to 1 megabyte (MB) of flash memory, and fourteen new 16-bit 78K0R/Kx3 MCUs with up to 512 KB of memory and 144-pin packages.

With the addition of these latest devices, NEC Electronics now boasts a comprehensive lineup of 208 all-Flash MCUs, ranging from cost-efficient 8-bit devices to high-performance 32-bit devices with a wide selection of memory devices and pin-count options to suit the diverse needs of system designers.

As part of an NEC Electronics global manufacturing strategy announced in February 2006, NEC Electronics America is expanding its semiconductor manufacturing capabilities in Roseville, California, by adding a 0.15-micron process using eight-inch wafers to the current 0.35- and 0.25-micron processes using six-inch wafers. The pilot line is expected to begin mass production during the summer of 2007.

The new devices are currently available at $13.50 for the V850ES/JJ3 MCUs and $9 for the 78K0R/Kx3 MCUs in sample quantities. The 32-bit V850ES/JJ3 is expected to be ready for volume production by May 2007, and the 78K0R/Kx3 is expected to be ready for volume production by October 2007. Total monthly production for all sixteen devices is expected to reach 100,000 units worldwide by the first quarter of 2008.

STMicroelectronics' 8-bit ST7FMC Family Now Qualified for Automotive Applications

STMicroelectronics, announced that its ST7FMC microcontroller family has been Automotive-Grade qualified to meet the specific and rigorous demands of the automotive market. Built around an industry-standard 8-bit core and designed for driving Brushless Direct Current (BLDC) motors, this microcontroller family is ideal for use in various car body applications such as fuel and water pumps, cooling fans and interior blowers.

The ST7FMC family features higher system integration compared to alternative microprocessor or DSP-based approaches. The family features an embedded motor-control cell, which includes six-phase PWM control, voltage or current sensing, and a highly flexible Back Electromotive Force (BEMF) detector for the sensorless control of permanent-magnet BLDC motors. All the application-specific devices in the family now operate over the full automotive temperature range of -40 degrees C to +125 degrees C and include safety features such as current sensing used for stall detection, asynchronous emergency stop, write-once registers and Clock Security System (CSS). ST's patented algorithms also enable the motor-control cell to offer unique fail-free motor-starting capabilities.

The higher integration of the family allows reduced code size, while the addition of the motor-control cell minimizes the CPU load to control the motor. In addition, an integrated LIN communication interface and the availability of a complete set of standard peripherals control various application environments.

Housed in tiny TQFP32 and TQFP44 packages, the devices are available now in production volume. Pricing starts from $1.65, depending on the device, in 10,000-unit quantities.

TI's New TMS320C6454 DSP Supplies Improvements in Memory and I/O at Lower Cost

Texas Instruments announced the availability of the cost-effective, high-performance TMS320C6454 DSP. The new 1GHz C6454 DSP is based on the TMS320C64x+TM DSP core and TI's highest-performing DSP architecture.

TI also announced that the TMS320C6455 DSP is in production, making it the only DSP with Serial RapidIO (sRIO) in production.

The C6454 DSP provides an ideal migration path for the many TI customers who are currently using C641x DSPs. The C6454 DSP achieves 8000 MMAC (million multiply accumulate cycles per second) and four times the EDMA throughput of the core used in the earlier devices. It provides additional features, such as 1MB L2 memory, gigabit Ethernet, C64x+ core and increased DDR2 external memory and cache, and is similarly priced to C641x devices.

Comparably priced with the widely used C641x DSPs but based on the enhanced C64x+ architecture, the C6454 DSP offers designers a 20- to 30-percent reduction in code size. The C6454 DSP also achieves a 20-percent increase in cycle efficiency due to the core's specialized instruction set with support for the frequently performed FFT, FIR and DCT operations.

High-speed peripherals include a Gigabit Ethernet MAC and a 66-MHz PCI interface to allow video infrastructure, telecom and video-imaging customers to meet high-bandwidth interconnections. The C6454 DSP doubles L1 data and L1 instruction cache and provides a twofold increase in DDR2 external memory at 533 MHz to provide balanced memory I/O and processor performance. Since the C6454 DSP is code-compatible and is based on the C64x+ core, customers also profit from a 4x increase in EDMA bandwidth and twice the number of 16-bit MMACs.

The C6454 DSP is a lower-cost alternative to the C6455 DSP, allowing customers to reap a $60 saving due to the reduction in on-chip L2 memory to 1MB and the removal of peripherals, including UTOPIA and sRIO, the Viterbi coprocessor (VCP2) and Turbo coprocessor (TCP2), which are not always required in certain designs. For programmers that demand the highest-performing C64x DSP platform but not necessarily the multi-chip interconnect capabilities, the C6454 DSP without the SRIO bus is an affordable, more economical alternative. Developers presently using the C6455 DSP who will benefit by transitioning to the C6454 DSP will have minimal hardware redesign since the two devices are completely pin-compatible.

The TMS320C6454 DSP is now available for $94 at 720 MHz in 10,000-unit quantities from TI and TI Authorized Distributors. The device is packaged in a 24 × 24 mm, 697-lead BGA.

Crossware Adds Support for 21 More NXP ARM Microcontrollers

Crossware has added support to its ARM Development Suite for 21 more NXP Semiconductor ARM-based microcontrollers. All of NXP's LPC21xx and LPC22xx chips are now supported.

Many of the newly supported chips include an external memory controller, allowing them access to external Flash memory and external RAM. The Crossware environment makes it easy to configure this memory controller and the chip's memory interface pins -- a process that would otherwise require a time-consuming study of the manufacturer's data sheet and detailed analysis of the interaction between resources competing for the pins. The Crossware Code Creation Wizard presents a graphical view that shows clearly which pins will be allocated simultaneously.

Programming external memory also requires the debugger to pre-configure the chip prior to the download process. The Crossware environment can automatically create a configuration script either from the simulating program or from the configured hardware, thereby eliminating the need for a script to be created manually.

Crossware's experience of Flash memory programming within the Coldfire architecture has been transferred to the ARM environment, so a wide range of Flash memory chips are supported including AMD-compatible Flash memory and Intel's Strataflash.

Code Creation Wizards will create code for all of the microcontrollers' on-chip peripherals. Two interfaces to the Code Creation Wizards are provided within the ARM Development Suite. A graphical interface allows rapid configuration of the main elements of the peripheral. The other interface is more text-based and presents the user with register and bitfield names and a click-and-insert method for creating instructions that read and write registers, wait for bits to be set or cleared, etc. This second interface allows the user to generate arbitrary code rapidly and without reference to the manufacturer's documentation.

The Crossware ARM Development Suite provides a complete and extremely user-friendly development environment for the ARM family of microprocessor cores, with its advanced C/C++ compiler, libraries, wizards, simulator, source-level debugger and the included Jaguar USB JTAG debugger interface.

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